Physical Layout & I/O
Explore the hardware layout and I/O interfaces of the ALPON X5 AI edge computer. Understand ports, connectivity, and system architecture for integration.
ALPON X5 AI physical layout & I/O
Pinouts, ports, indicators, and electrical characteristics for every externally accessible interface on the ALPON X5 AI industrial edge AI computer. Use this reference to wire the device, drive its GPIO from software, and plan field installations. Intelligented by DEEPX. Built on Raspberry Pi.
The ALPON X5 AI exposes 3 power inputs (USB-C PD, 12–32 V DC terminal, optional PoE+), 2× Gigabit Ethernet, 2× USB 3.0, HDMI 2.0 for display, a MIPI CSI-2 camera port over Mini HDMI, an RJ45 GPIO Add-on port (I²C / UART / SPI at 3.3 V logic), 4 LED indicators, 2 user buttons, and 2 DIP switches for watchdog and image-flash mode.
Device layout
The ALPON X5 AI is housed in a fanless aluminum enclosure. All I/O is split between the front face (power, USB, display, camera, indicators) and the rear face (Ethernet, GPIO, antennas, switches). Click any image to enlarge.
Front face
Rear face
Enclosure
Mechanical specifications
Need 2D drawings or STEP files?
Mounting templates, hole patterns, and CAD files are on the Power & Mounting page.
Power input
The ALPON X5 AI accepts power from three independent sources. There is no hard priority between inputs: the device draws from the source with the highest voltage. All inputs pass through ideal-diode protection.
Hardware tolerates simultaneous connection across USB-C, terminal, and PoE+, but use a single source in production to simplify failure analysis and avoid ground loops.
USB Type-C PD
Sink-only USB-PD port. Does not provide USB data or output power during normal operation. USB data is available only when SW2 is set to Burn (image flashing) mode.
CYPD3177-24LQXQ
Powering the device at 5–12 V via USB-C forces the system into Restricted Mode to prevent brownout.
Screw terminal (12–32 V DC)
The recommended input for industrial edge computing deployments. The 3-pin terminal includes hardware reverse-polarity protection: swapped wiring will not damage the device, but it will not power on either.
Power over Ethernet (PoE+)
PoE+ is available only on PoE-variant SKUs. When present, PoE+ is wired to ETHERNET 0; ETHERNET 1 does not accept PoE.
Restricted Mode
If any input drops below 12 V (for example a 5 V supply on USB-C), the device enters Restricted Mode: a protective state that keeps core functions running on minimal power.
Core subsystems keep running so the device stays reachable.
- CM5 Compute Module
- LTE Modem
- ETHERNET 0
- ETHERNET 1
High-draw interfaces are disabled to prevent brownout.
- USB Ports
- PCIe (NVMe SSD + AI Accelerator)
- GPIO Add-on Port
- Camera Port
Power consumption
Approximate subsystem draw at idle, 50% load, and full load. Dashes indicate negligible standalone consumption.
Ethernet ports
Two Gigabit (1 Gbps) RJ45 ports with different electrical topologies. Use both for WAN + LAN routing, dual-NIC redundancy, or isolating trusted and field segments.
ETHERNET 0 Native PoE+
Direct native Ethernet on the CM5. Carries PoE+ on PoE-variant SKUs.
ETHERNET 1 USB Bridge
USB-to-Gigabit bridge via RTL8153B. Shares the 5 Gbps USB 3.0 bus with USB Port 2.
Because ETHERNET 1 shares its USB 3.0 uplink with USB Port 2, throughput on both interfaces drops when saturated simultaneously. For edge AI inference workloads streaming over the network, prefer ETHERNET 0.
USB 3.0 ports
Two USB 3.0 ports rated at 5 Gbps each, with a combined power budget of 1.8 A at 5 V across both ports.
TUSB8020 hub (shares uplink with ETHERNET 1)
Avoid two high-draw peripherals at once (for example external SSD plus a bus-powered camera). Exceeding 1.8 A total trips the overcurrent limiter.
Display (HDMI 2.0)
Single HDMI 2.0 port driven directly by the CM5. Supports up to 4K @ 60 Hz with HDR and audio pass-through. For supported refresh-rate and color-depth combinations, see the Raspberry Pi CM5 datasheet.
Hot-plug is supported, but display detection runs at boot. For first-time setup or headless-to-monitor transitions, plug in HDMI before powering the device.
Camera port (MIPI CSI-2)
The camera interface routes the CM5 MIPI CSI-2 lane through a Mini HDMI connector on the front face. This is the primary input path for edge AI vision workloads on the DEEPX DX-M1 NPU.
The Mini HDMI shell carries MIPI CSI-2 differential lanes, not HDMI video. Connecting a display, capture card, or HDMI splitter has no functional effect and is not supported.
GPIO Add-on port (RJ45)
The GPIO Add-on port exposes six configurable CM5 pins over an RJ45 connector, providing I²C, UART, and SPI for ALPON Edge Add-on modules. Signals are 3.3 V logic with built-in level conversion, ESD protection, and 1 kΩ hardware pull-ups.
Although the connector is RJ45, this port is not Ethernet and not PoE-capable. Connecting it to a switch, router, or PoE injector will cause permanent hardware damage. Use only with compatible ALPON Add-on modules.
Pin assignment
GND · Ground
GPIO 12 · SPI5_CSn[0], UART4_TX, I2C2_SDA
GPIO 14 · SPI5_SIO[0], UART0_TX, I2C3_SDA
GPIO 13 · SPI5_SIO[1], UART4_RX, I2C2_SCL
GPIO 15 · SPI5_SCLK, UART0_RX, I2C3_SCL
GPIO 23 · I2C3_SCL
GPIO 22 · I2C3_SDA
5V OUT · 5 V output, max 1 A. Gated by GPIO 21 power switch
Electrical characteristics
GPIO 21 · must be HIGH before I/O
GPIO 20 · HIGH normally, LOW on fault
Enabling the port from software
The 5 V supply and signal I/O are gated by an on-board power switch. Drive GPIO 21 HIGH to activate the port, then read GPIO 20 to confirm no fault is asserted.
ADDON_PWS_EN
GPIO 21 · Drive HIGH to activate the port. I/O is inactive while LOW.
ADDON_PWS_FAULT
GPIO 20 · Reads HIGH normally. Goes LOW on overcurrent, overtemperature, or reverse-voltage events. The hardware also cuts the 5 V rail automatically.
# 1. Enable the GPIO Add-on port power rail pinctrl set 21 op dh # drive GPIO 21 HIGH pinctrl get 20 # read fault line, expect 1 (HIGH)
LED indicators
Four LEDs on the front face report system state. All LEDs are driven through the TCA6408 I²C I/O expander at address 0x20 on the I²C1 bus (SDA: GPIO 2, SCL: GPIO 3).
User-programmable. Set color by writing the corresponding R/G/B expander pins to LOW.
Driven by ALPON X5 AI OS and the Sixfab Connect agent.
Connection and application status indicator driven by the Sixfab Connect agent.
Lights when any valid power input is present.
The Power LED is active HIGH. The RGB and Status LEDs are active LOW: write 0 to the expander pin to turn the color on.
Push buttons
Two user-programmable buttons: PB1 on the front face and PB2 on the rear. Both lines are pulled HIGH by default and read LOW while pressed.
GPIO 5 · Pulled HIGH · LOW when pressed · user-defined action
GPIO 6 · Pulled HIGH · LOW when pressed · user-defined action
Watchdog & Boot/Burn switches
Two DIP switches sit under a silicone cap on the rear face. Both ship OFF by default and should remain OFF during normal operation. Use a pointed tool to lift the cap from its notch.
SW1 · Hardware watchdog
The hardware watchdog monitors system liveness independently of the OS. When enabled (SW1 OFF), the CM5 must toggle GPIO 16 at least once every 5 minutes. If no trigger arrives, the watchdog cuts power, waits 3 seconds, then re-applies power for a cold reboot.
- Trigger pin:
GPIO 16 - Timeout: 5 minutes
- Recommended period: 2-second HIGH pulse every 60 seconds
- Status read pin:
GPIO 8· HIGH when SW1 = OFF (enabled), LOW when SW1 = ON (disabled) - Disable method: physical SW1 only · no software command
SW2 · Boot / Burn mode
SW2 selects between normal operation (Boot) and CM5 image flashing over USB-C (Burn). In Burn mode, the USB-C port exposes the CM5 flashing interface to a host PC running rpiboot.
The device must be completely powered off when switching between Boot and Burn modes. Toggling SW2 while powered can corrupt the CM5 eMMC or brick the boot sequence. Always return both switches to OFF after flashing.
If an image is damaged or needs reflashing, contact Sixfab support before attempting the flash. Unguided reflashing can make recovery harder.
Antenna connectors
Four SMA connectors on the rear face carry the wireless interfaces. Labels on the enclosure identify each port.
The Wi-Fi port uses a male (RP-SMA) connector; GNSS and both LTE ports use female connectors. Supplied antennas are keyed accordingly. Verify thread compatibility before forcing a connection.
Radiation patterns & certified bands
LTE band list, antenna gain, and certified RF specs.
Internal bus topology
How each external interface maps back to the CM5. Useful for diagnosing throughput limits and shared-rail behavior.
Updated 10 days ago