Sixfab Edge AI Expansion Board for Raspberry Pi 5

A bottom-mount baseboard for Raspberry Pi 5 that combines the DEEPX DX-M1 M.2 AI Module (up to 25 TOPS at INT8), an NVMe SSD slot, and an LTE/5G modem slot in one stack. The AI accelerator connects over PCIe Gen 2/Gen 3 x1 via a 40 mm FFC; storage and cellular share an internal USB 3.2 Gen 1 (5 Gbps) hub. One USB-C PD input powers the full stack and back-powers the Pi 5 through pogo pins. Intelligented by DEEPX. Built on Raspberry Pi.

Up to 25 TOPS DEEPX DX-M1 Triple M.2 Raspberry Pi 5 PCIe Gen 2/Gen 3 x1 USB-C PD

Quickstart Specifications

Edge AI Expansion Board · Overview · Intelligented by DEEPX · Built on Raspberry Pi

What is the Sixfab Edge AI Expansion Board?

The Sixfab Edge AI Expansion Board for Raspberry Pi 5 is an under-board expansion base that carries the DEEPX DX-M1 M.2 AI Module (up to 25 TOPS at INT8), plus a separate NVMe SSD slot and an LTE/5G M.2 slot. The AI accelerator connects over PCIe Gen 2 or Gen 3 x1 via a 40 mm FFC; storage and cellular share an internal USB 3.2 Gen 1 (5 Gbps) hub. A single USB-C PD input powers the full stack and back-powers the Pi 5 through pogo pins. Intelligented by DEEPX. Built on Raspberry Pi.

NPU

Up to 25 TOPS

INT8 · DEEPX DX-M1 M.2 AI Module

Host link

PCIe Gen 2/Gen 3

x1 · 40 mm PCIe FFC

Expansion

3× M.2

AI + NVMe + LTE/5G

Power input

USB-C PD

27 W min · 45 W recommended

What the Edge AI Expansion Board is

The Sixfab Edge AI Expansion Board is an under-board baseboard for Raspberry Pi 5 that integrates three subsystems production vision workloads usually need together: a dedicated DEEPX neural processing unit for inference, fast local storage for buffering and logging, and a cellular modem for wide-area connectivity. All three slots can be populated and operated concurrently with no measurable degradation in AI throughput.

The AI accelerator slot connects to the Raspberry Pi 5 over a dedicated PCIe Gen 2/Gen 3 x1 link through a 40 mm FFC cable, separate from the NVMe and cellular paths. PCIe Gen 2 is the default on Raspberry Pi OS for stability; Gen 3 is enabled by adding dtparam=pciex1_gen=3 to /boot/firmware/config.txt. Measured bandwidth is 400–450 MB/s at Gen 2 and 800–900 MB/s at Gen 3.

The NVMe and cellular slots are routed through an on-board USB 3.2 Gen 1 (5 Gbps) hub: NVMe via a Realtek RTL9210B-CG USB-to-NVMe bridge, cellular via the USB Bridge PCBA. The OS sees these as standard USB Mass Storage and USB cellular devices, so they require no extra kernel drivers beyond what Raspberry Pi OS ships. The board is shipped today with a vision focus: object detection, classification, segmentation, pose estimation. LLMs are on the DEEPX silicon roadmap and Sixfab will support them as the silicon enables. No dates.

Two variants

The Edge AI Expansion Board ships in two bundle compositions. Both contain the same baseboard, the same mounting kit, and the same accessories. The difference is whether the DEEPX DX-M1 M.2 AI module is included in the box.

Variant 1: Board only

DEEPX M1 ready

Module not included

AI Expansion Board 1×

USB 3.0 Bridge 1×

PCIe Cable (40 mm FFC) 1×

M2.5 15 mm F-F plastic spacer 6×

M2.5 5 mm M-F plastic spacer 4×

M2.5 screw 6×

M2 flathead screw 3×

M2 module plastic spacer 3×

USB Type-C plastic cap 1×

DEEPX DX-M1 M.2 AI module Not included

For customers who already have a DEEPX DX-M1 M.2 AI Module, want to source the module on a separate purchase order, or need to standardise a single board SKU across deployments.

Variant 2: Board + DEEPX M1 module

Ready to inference out of the box

Bundled module

AI Expansion Board 1×

USB 3.0 Bridge 1×

PCIe Cable (40 mm FFC) 1×

M2.5 15 mm F-F plastic spacer 6×

M2.5 5 mm M-F plastic spacer 4×

M2.5 screw 6×

M2 flathead screw 3×

M2 module plastic spacer 3×

USB Type-C plastic cap 1×

DEEPX DX-M1 M.2 AI module 1× included

The single-SKU path from box to first inference. Includes the DEEPX DX-M1 M.2 module pre-bundled with the board; install, stack on the Pi 5, install the runtime, and run dxrt-cli -s.

The DEEPX silicon runs INT8 only. The DXNN compiler quantizes models from FP32 to INT8 automatically; expect approximately 2 % accuracy loss compared with the original trained model. Plan benchmarks and acceptance criteria around the quantized model, not the FP32 baseline.

Key features

DEEPX NPU on a swappable M.2 module

The DEEPX DX-M1 M.2 AI Module delivers up to 25 TOPS at INT8 precision on a removable M.2 M-Key module rather than soldered to the PCB. Swap or replace the module without changing the board, with the Pi 5 powered off.

Triple M.2: AI + NVMe + LTE/5G

Three dedicated slots: M.2 M-Key for the DX-M1 over PCIe, M.2 M-Key for NVMe storage via the on-board USB 3.2 Gen 1 hub, and M.2 Key-B for an LTE/5G modem with a nano SIM slot (eUICC supported).

Single USB-C PD powers the stack

One USB-C PD input (5 V/5 A · 9 V/3 A · 12 V/2.25 A) feeds the board and back-powers Raspberry Pi 5 through pogo pins on the GPIO header underside. The Pi 5's own USB-C port stays free and gets a blanking plug.

Two software paths

Start with the Sixfab Model Zoo for pre-compiled DXNN models, or use the DXNN SDK for the full ONNX → DXNN compile flow. The Sixfab × Ultralytics acceleration path takes a labeled dataset to a deployed custom model in days.

On-device inference, no cloud

After the runtime install, the system runs fully offline. No frames or model outputs leave the Pi 5 unless the user application explicitly forwards them, a fit for privacy-sensitive vision deployments. Cellular is for outbound results, not inference.

Concurrent AI + storage + cellular

The dedicated PCIe lane keeps the NPU isolated from the USB hub. Simultaneous NVMe writes and LTE/5G traffic do not degrade AI throughput. Buffer locally, forward over WAN, and infer, all at the same time.

How a deployment runs on the stack

The Edge AI Expansion Board lets the Raspberry Pi 5 keep doing what it is good at (capture, application logic, and I/O) while offloading inference to the DEEPX NPU and pushing buffered data through storage or the cellular link.

Deployment data flow

Step 1

Capture on Pi 5

CSI, USB, or IP camera feeds frames into the Pi 5. The Pi handles capture and pre-processing.

Step 2

NPU inference

DEEPX NPU runs the compiled DXNN model. INT8 execution over PCIe Gen 2/Gen 3 x1.

Step 3

Buffer on NVMe

Frames, detections, or events written to NVMe via the on-board USB 3.2 Gen 1 hub. 380–440 MB/s sequential.

Step 4

Forward over LTE/5G

Events or summaries pushed out through the M.2 Key-B modem. Raw frames never need to leave.

Why these three lanes

PCIe Gen 2/Gen 3 x1 gives the NPU a dedicated, deterministic data path that does not contend with NVMe or cellular. The USB 3.2 Gen 1 hub handles storage and the modem in parallel. Concurrent NVMe writes and LTE/5G traffic do not degrade AI inference throughput in tests.

Software: two paths to a running model

Both paths run on top of the same DEEPX runtime (dxrt-runtime) and the kernel driver shipped from the Sixfab APT repository on Raspberry Pi OS. The difference is what is on disk before dxrt-cli -s is run.

Path 1

Sixfab Model Zoo

Fastest start

A curated set of pre-compiled DXNN models (YOLOv8 family, MobileNet, ResNet, and others) ready to deploy without any compiler workflow.

No compilation step. Download the .dxnn artifact and run it.
Reference inference scripts for camera input and recorded video.
Sourced from github.com/sixfab/sixfab-dx-examples; auto-install.sh sets up the Python and C++ example trees.

Path 2

Custom Models (DXNN SDK)

Full custom deployment

The DXNN SDK compiles a model from ONNX down to the DXNN format the NPU executes. PyTorch, TensorFlow, Keras, and Ultralytics models export to ONNX first, then the DXNN compiler (dx-com) handles quantization and graph mapping.

ONNX → DXNN compile path with automatic INT8 quantization.
Sixfab × Ultralytics acceleration path for custom YOLO models.
Compiler runs on x86_64 Ubuntu (20.04 / 22.04 / 24.04), ≥16 GB RAM, ≥8 GB disk. Not on the Pi.

Validate the hardware first with the Sixfab Model Zoo: a Pi 5, an Edge AI Expansion Board with the DX-M1 installed, and a YOLOv8n DXNN file are enough to confirm the NPU is detected on PCIe and producing correct output. From there, move to the DXNN SDK when the application needs a model that is not in the zoo or a custom-trained one.

What you can build

The Edge AI Expansion Board is sized for connected edge deployments where local inference, on-device buffering, and dependable WAN connectivity are required at the same time. Examples below; this is a sample, not a limit.

Connected AI cameras & security

Detection and intrusion analytics with on-device buffering to NVMe and event forwarding over LTE/5G. Frames stay local, only events leave.

Smart-city & infrastructure

Traffic and pedestrian analytics with cellular backhaul. Suitable for sites without wired networking; power the stack from a single USB-C PD supply.

Mobile & stationary robotics

AMRs and inspection robots that need vision inference plus connected logging: NVMe for telemetry, LTE/5G for OTA fleet links.

Industrial inspection & QC

Defect detection on assembly lines with local storage of evidence frames and remote dashboards via cellular when wired networking is restricted.

Remote monitoring & AIoT gateways

Sensor fusion plus on-device inference at unattended sites. Pogo-pin back-power keeps the wiring on one connector for easier enclosure design.

Privacy-sensitive analytics

Healthcare, retail, and workplace deployments where raw video must not leave the device. Inference runs locally; only structured outputs travel.

What the Edge AI Expansion Board does not do

Stating limits up front is part of the brand contract. Plan deployments against the lines below; do not plan against marketing speculation.

Vision today, LLMs later

The DEEPX silicon is sized for vision and similar inference workloads. LLM support is on the DEEPX roadmap and Sixfab will support it as the silicon enables. No dates.

No on-device training

Training is done independently on a host machine. Trained models are exported to ONNX and compiled with the DXNN compiler before deployment, or built through the Sixfab × Ultralytics acceleration path.

Not hot-pluggable

The Raspberry Pi 5 must be powered off and the USB-C cable disconnected before mounting or removing the Edge AI Expansion Board or any M.2 module.

INT8 only on the NPU

The DXNN compiler quantizes from FP32 to INT8 automatically. Approximately 2 % accuracy loss versus the original trained model is expected.

NVMe is USB-attached

The NVMe slot is routed through the on-board USB 3.2 Gen 1 hub and a Realtek RTL9210B-CG bridge. The OS sees a USB Mass Storage device (/dev/sda), capped at the 5 Gbps USB bus, 380–440 MB/s sequential read in practice.

Needs the 27 W PSU

Standard 5 V / 3 A (15 W) supplies are insufficient. The official Raspberry Pi 27 W USB-C PD power supply is the minimum; 45 W is recommended for full-stack configurations (AI + NVMe + cellular populated).

Compatibility

The Edge AI Expansion Board is designed for the Raspberry Pi 5 host platform, with support for the Raspberry Pi Compute Module 5 via the official Raspberry Pi CM5 IO Board. The mechanical footprint, the pogo-pin back-power layout, the PCIe FFC orientation, and the USB hub routing are tuned to the Pi 5 board revision.

Supported host platforms

Supported

Raspberry Pi 5 with 4 GB or 8 GB of RAM, the primary host platform.
Raspberry Pi Compute Module 5 via the official Raspberry Pi CM5 IO Board.

Not supported

Raspberry Pi 5 with 2 GB RAM: insufficient memory for the AI + storage + cellular workload.
Raspberry Pi 4 and Compute Module 4.
Non-Raspberry Pi SBCs (Orange Pi, Rock Pi, Jetson, etc.), even those with a PCIe FFC interface.

Co-existence with other Pi 5 accessories: the Edge AI Expansion Board forwards the Pi 5 GPIO header upward without consuming any data pins, so a standard top-mounted HAT can still be used. The official Raspberry Pi Active Cooler is 100 % compatible. Camera Module 2 (IMX219), Camera Module 3 (IMX708), HQ Camera (IMX477), and Global Shutter Camera (IMX296) are tested.

Recommended bring-up kit

Everything needed to get a Raspberry Pi 5 and an Edge AI Expansion Board from the box to a running inference. The left column is what the Edge AI Expansion Board ships with; the right column is what to buy alongside it. The last item on the left, the DEEPX DX-M1 M.2 AI module, ships only with Variant 2; Variant 1 customers source it separately.

In the box

9–10 items

01

Edge AI Expansion Board

The baseboard itself, with the on-board USB 3.2 Gen 1 hub, three M.2 slots (AI, NVMe, cellular), USB-C PD input, and pogo pins for back-powering the Pi 5. 88.46 × 89.19 mm overall.
02

USB 3.0 Bridge

One piece. The internal USB Bridge PCBA that routes the M.2 NVMe and M.2 cellular slots through the on-board USB 3.2 Gen 1 (5 Gbps) hub.
03

PCIe FFC cable

40 × 8.5 mm. Connects the Raspberry Pi 5's external PCIe port to the Edge AI Expansion Board. Labeled RPi5 on one end and Edge AI on the other for foolproof orientation. Pin 1 arrows match the PCB markings.
04

M2.5 F-F spacers, 15 mm

Six pieces. Bottom standoffs. Lift the assembled stack off the work surface so the Edge AI Expansion Board can sit underneath the Pi 5.
05

M2.5 M-F spacers, 5 mm

Four pieces. Set the clearance between the Edge AI Expansion Board and the Raspberry Pi 5 PCB and ensure proper pogo-pin contact on the GPIO header underside.
06

M2.5 screws

Six pieces. Fasten the M2.5 spacer stack between the Raspberry Pi 5 and the Edge AI Expansion Board. Finger-tight only; over-torquing can damage the standoffs.
07

M2 flat-head screws

Three pieces. Secure the M.2 modules (AI, NVMe, cellular) into their slots. Finger-tight only.
08

M2 module plastic spacers

Three pieces. Level each M.2 module (AI, NVMe, cellular) in its slot so the module sits flush against the standoff before tightening.
09

USB-C blanking plug

Fits the Raspberry Pi 5's own USB-C port, which stays free because the Edge AI Expansion Board's USB-C PD input back-powers the Pi 5 through the pogo pins.
10

DEEPX DX-M1 M.2 AI module Variant 2 only

One piece. The DEEPX neural processing unit on an M.2 M-Key module, up to 25 TOPS at INT8 precision, with 4 GB LPDDR5 @ 5600 MT/s on-package memory. Ships pre-bundled with Variant 2; Variant 1 buyers source the module separately and install it into the AI M.2 slot.

You'll also need

Buy separately

01

Raspberry Pi 5

4 GB or 8 GB. The 8 GB variant is recommended for multi-stream or heavy pre-processing workloads. The 2 GB variant is not supported.
02

USB-C PD power supply

The official Raspberry Pi 27 W USB-C PD supply is the minimum. 45 W is recommended when AI, NVMe, and cellular are all populated. Standard 15 W chargers cause under-voltage warnings and SSD disconnects.
03

microSD card

Class 10 / A2, 32 GB or larger. Holds Raspberry Pi OS, dxrt-runtime, and any compiled DXNN model files.
04

Raspberry Pi Active Cooler Recommended

The Pi 5 sits on top of the Edge AI Expansion Board; without active cooling the Pi 5 CPU can throttle under sustained load. The Edge AI Expansion Board does not have a fan connector of its own; the Active Cooler runs from the Pi 5's own JST-SH header.
05

NVMe SSD (M.2 M-Key) Optional

2230 / 2242 / 2260 / 2280 form factors. The 256 GB and 512 GB Raspberry Pi NVMe SSDs are the validated reference; other M-Key NVMe SSDs in the four supported sizes work but are not part of the validated list.
06

LTE/5G M.2 modem & nano SIM Optional

An M.2 Key-B cellular modem and a nano SIM (eUICC supported). Only needed for deployments that require WAN connectivity from the device itself.
07

Camera Optional

A Raspberry Pi Camera Module, a USB camera, or an IP camera (RTSP). Only needed for live-video pipelines; recorded video files work without one.

Partnership lockups

Intelligented by DEEPX. Built on Raspberry Pi.

DEEPX silicon. Raspberry Pi host. Sixfab integration, software stack, and support.