Overview

AI Model Deployment

Three Sixfab edge AI products, one shared stack. The Sixfab AI HAT+ for Raspberry Pi 5, the Sixfab Edge AI Expansion Board, and the ALPON X5 AI all run the same DEEPX silicon family, the same dxrt-runtime, and the same .dxnn model format. Compile a model once. Deploy it on any of the three.

Three products One SDK DEEPX silicon Raspberry Pi Intelligented by DEEPX
AI Model Deployment · Platform overview · Updated 2026-05-17
What is Sixfab AI Model Deployment?

AI Model Deployment is the cross-product technical surface for every Sixfab edge AI product. Sixfab AI HAT+, Edge AI Expansion Board, and ALPON X5 AI share one DEEPX silicon family, one dxrt-runtime, one .dxnn model format, and one DX-COM compiler. The same compiled model file deploys to all three without rebuild. This sidebar is where the shared stack lives as a single source of truth, so each product's sidebar can link in instead of duplicating Model Zoo, DXNN SDK, runtime, and monitoring content three times over.

The three products

The three Sixfab edge AI products differ in form factor, host integration, and the DEEPX silicon variant they carry. They do not differ in software. Anything written against dxrt-runtime on one product runs on the other two.

Top-mount HAT+

Sixfab AI HAT+

25 / 13 TOPS
  • NPU variant DEEPX DX-M1M or DEEPX DX-M1ML
  • TOPS at INT8 25 TOPS (DX-M1M) or 13 TOPS (DX-M1ML)
  • Host platform Raspberry Pi 5 CM5 via Raspberry Pi CM5 IO Board
  • Form factor HAT+ specification compliant top-mount board
  • Best for Prototyping vision AI on Pi 5; makers, engineers, researchers

Bottom-mount expansion

Sixfab Edge AI Expansion Board

25 TOPS
  • NPU variant DEEPX DX-M1 M.2 module
  • TOPS at INT8 25 TOPS
  • Host platform Raspberry Pi 5
  • Form factor Bottom-mount board with three M.2 slots AI, NVMe SSD, LTE/5G modem
  • Best for Pi 5 production builds that need AI, storage, and cellular in one board

Industrial edge computer

ALPON X5 AI

25 TOPS
  • NPU variant DEEPX DX-M1 integrated
  • TOPS at INT8 25 TOPS
  • Host platform Raspberry Pi Compute Module 5 integrated; sealed system
  • Form factor Fanless aluminum enclosure IP40, DIN-rail mount option
  • Best for Industrial deployment, 24/7 operation, fleet-managed installations

Shared stack

Every Sixfab edge AI product runs the same five-layer stack. The NPU silicon is the same DEEPX family. The kernel driver, the user-space runtime, the model format, and the SDK are byte-identical across products. The application layer is where your code lives, and your code does not need to know which product it is running on.

5
Your application
Python or C++ code calling the DEEPX runtime API. OpenCV, GStreamer, your own pipeline, the bundled demos.
Python / C++
4
DXNN SDK + DX-COM compiler
ONNX → DXNN compilation toolchain. Runs on an Ubuntu x86_64 host; outputs a .dxnn binary the runtime executes.
dxcom
3
DEEPX runtime (dxrt-runtime)
Model loading, inference scheduling, memory management, async execution on the NPU. Same package across all three products.
sixfab-dx
2
DEEPX kernel driver
Linux kernel module that exposes the NPU as a PCIe device. Compiled against the running kernel at install time.
sixfab-dx
1
DEEPX silicon + on-chip firmware
DEEPX DX-M1, DX-M1M, or DX-M1ML. Same instruction set, same compiled .dxnn file format across variants. Firmware on onboard flash.
onboard flash

The practical consequence: one compiled .dxnn file deploys on AI HAT+, Edge AI Expansion Board, and ALPON X5 AI without rebuilding. A model compiled for DX-M1 runs on DX-M1; a model compiled for DX-M1M or DX-M1ML runs on AI HAT+. The SDK, runtime, and application code stay the same; only the silicon variant in the compile target differs.

Capability boundaries

These limits apply across the platform. They are not roadmap items framed as features. They define what the current DEEPX silicon does and does not do, and what the three products do and do not support today.

Vision today

The DEEPX silicon in scope runs vision models: detection, classification, segmentation, pose, OCR. LLMs and generative models are on the DEEPX roadmap and Sixfab will support them as the silicon enables. No dates.

No on-device training

Train independently in PyTorch or another framework, export to ONNX, then deploy via the DX-COM compiler. The managed alternative is the Sixfab × Ultralytics acceleration path.

No hot-plug on HAT+ or Expansion Board

Power off the Raspberry Pi 5 before mounting or removing either board. ALPON X5 AI is a sealed industrial system; the NPU is integrated, not user-removable.

Host compatibility

For AI HAT+ and Edge AI Expansion Board: Raspberry Pi 5 (primary), and Raspberry Pi Compute Module 5 via the official Raspberry Pi CM5 IO Board. Not supported: Pi 4, CM4, non-Raspberry Pi SBCs. ALPON X5 AI ships as a complete system built on Pi CM5 + DEEPX inside a fanless enclosure.

Which product is for me

Three short routes. Each one points to a product overview where the full spec lives. The AI Model Deployment sidebar covers everything you need after the product is in your hands; the product overview covers everything you need before.

Where to start

The AI Model Deployment sidebar has six content pages. Three of them are entry points; the other three are reference material you reach from them.

Start with the Sixfab Model Zoo

Pre-compiled .dxnn models you can run on any of the three products without writing a compile pipeline. Per-product FPS, deploy commands, methodology.

Open

Deploy your own model with the DXNN SDK

Two-machine workflow: compile on Ubuntu x86_64, run on the target device. ONNX → DX-COM → .dxnndxrt-runtime. INT8 quantisation with approximately 2 % accuracy loss versus the original FP32 model.

Open

Check the Supported Models Catalog first

DEEPX-supported operators and architecture compatibility: YOLO, MobileNet, ResNet, EfficientNet, ViT status. Plan the model architecture before custom model work.

Open
Intelligented by DEEPX Built on Raspberry Pi